According to AI TIMES, Huawei on September 17 unveiled "context memory storage" to relieve the KV cache bottleneck in AI inference, saying it supports up to 64PB in a single cluster. The OceanStor M900 emphasizes an architecture that connects the NPU and SSD in one hop, cutting latency to as low as 60 microseconds. Its core idea is to extend the KV cache, which has stayed in on-chip memory and DRAM, to SSDs so that the data needed for ultra-long context and multi-turn inference can be stored and reused in a larger shared space. Huawei said this architecture shows a shift from existing compute-centric AI infrastructure toward a model that combines storage and networks. It added that the design raises inference performance by improving cache access efficiency while also managing storage endurance, which has been cited as an issue in large-scale operations. In the end, this unveiling shows that beyond competition in the model itself, the memory architecture and data movement methods used in the inference stage are emerging as key factors in AI infrastructure competitiveness.