Microchip Expands Portfolio to Address AI Data Center Growth With High-Performance, Low-Power Solutions
TECHWORLD · · 6 views
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Microchip Technology expanded its portfolio of high-performance connectivity and storage solutions for data center infrastructure in response to growing AI workloads, and on the 13th announced new products and feature updates in PCIe connectivity, NVMe storage, and acceleration.
The new PCIe Gen 6-based Switchtec LLC switch supports up to 64 PCIe Gen 6 lanes and 32 ports, and provides DMA, P2P, PCIe multicast, partitioning, Hardware Root of Trust, and secure boot.
In storage, Microchip updated its Flashtec SSD controller and Adaptec SmartRAID 4300 features to include CNSA Suite 2.0, dual-port support, additional OS support, dynamic NVMe configuration, persistent event logging, P2P rebuild, and the StorageCore API.
As rising AI throughput drives up demand for data center infrastructure, Microchip Technology has expanded its portfolio of high-performance connectivity and storage solutions for data center infrastructure to address growing AI workloads. On the 13th, Microchip announced new products and feature updates in PCIe connectivity, NVMe storage, and acceleration.
The target environments for this announcement are AI data centers, enterprise, hyperscale computing, and the intelligent edge. The company said it introduced new products and feature enhancements aimed at meeting demands for performance, power efficiency, security, and scalability.
Brian McCarson, vice president and general manager of Microchip's Data Center Solutions business unit, said the company has presented a technology partner that can simplify designs, accelerate deployment, and address challenges across the infrastructure stack according to customer demand. The company said this will help reduce customers' design and deployment burdens and support responses to a broad range of infrastructure challenges.
Brian McCarson said Microchip's role is to provide the foundation for distributed expansion and for building efficient, secure, and highly adaptable platforms for data-intensive computing environments.
Among the key products in the expanded portfolio is a PCIe Gen 6-based Switchtec LLC Low-Lane-Count switch. It is designed to provide PCIe Gen 6 connectivity for a wide range of systems, including space- and power-constrained environments. The new product supports up to 64 PCIe Gen 6 lanes and 32 ports, and offers x2, x4, x8, and x16 bifurcation options.
The product retains key features of the existing high-capacity Switchtec Gen 6 family. It includes integrated DMA(Direct Memory Access) capabilities to reduce host CPU intervention and supports direct P2P(Peer-to-Peer) data movement between connected devices. It also provides PCIe multicast and partitioning functions.
The product strengthens system security by applying Hardware Root of Trust and secure boot. It also reduces size and power consumption. This expands its scope to data center and intelligent edge applications.
Because AI data centers are characterized by large volumes of data movement among many devices, including accelerators and storage, connection architecture efficiency and power consumption are considered major factors in system design. In response, Microchip plans to address connectivity efficiency and power efficiency requirements with its PCIe Gen 6 switches.
In storage, the company updated its Flashtec SSD controller portfolio based on an enhanced version of the PCIe Gen 5 NVMe 5016 controller. The underlying architecture delivers high performance and power-optimized characteristics.
The key new feature in this update is support for CNSA(Commercial National Security Algorithm) Suite 2.0. This is intended to help prepare for post-quantum security requirements and targets next-generation enterprise SSD designs and AI data center storage designs.
Dual-port functionality provides redundant data paths and load balancing, supporting the building of high-availability storage architectures. It also offers advanced virtualization, QoS(Quality of Service) management, and flexible programmability to support performance optimization tailored to system requirements.
Microchip is pushing ahead with these feature improvements to address evolving NAND technology and high-capacity SSD designs. Based on this, it plans to expand the applicability of its storage solutions for enterprise data centers, hyperscale data centers, and the AI infrastructure market.
At the same time, Microchip expanded the NVMe RAID storage accelerator capabilities of the Adaptec SmartRAID 4300 family. This update focuses on strengthening storage security, reducing system downtime, improving data protection, and enhancing platform compatibility.
Data protection features now include SEDs with support for local and remote key management, RAID 6 options, and RAID 60 options. These additions enhance security across a variety of storage environments and improve data resilience.
As operating system support was expanded, supported OSs now include Linux, Debian, Ubuntu, and Microsoft Windows 11, broadening applicability across a wider range of systems.
The update also adds dynamic NVMe configuration, persistent event logging, and P2P rebuild functionality. These features enable management during system operation, minimize service interruptions during storage reconfiguration and management, and aim to reduce CPU burden and operational management overhead by expanding CPU offload through P2P rebuild.
It also supports the StorageCore API, increasing flexibility for integrating third-party management tools. Customers can use host application-based in-band management and customized BMC(Baseboard Management Controller) framework-based out-of-band management, allowing SmartRAID functions to be integrated.
Source: TECHWORLD · Park Kyu-chan
Original: https://www.epnc.co.kr/news/articleView.html?idxno=408095
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Source: TECHWORLD
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