Siemens and TSMC Aim to Reshape Chip Design With ‘AI Agents’
TECHWORLD ·
✦ AI Summary
Siemens Digital Industries Software's Siemens EDA business unit said on the 7th that it will strengthen innovations in AI automation and advanced semiconductor design support based on its ongoing collaboration with TSMC.
The two companies are applying AI and agentic workflows to DRC error fixing, place-and-route, 3D IC design, and silicon photonics design based on the TSMC OIP ecosystem.
They are also pursuing improved design productivity and better tape-out efficiency through Calibre-based AI agents, the Fuse EDA AI System and Fuse EDA AI Agent, and certifications for 3D IC, multiphysics, and advanced process technologies.
Siemens EDA, the EDA business unit of Siemens Digital Industries Software, announced on the 7th that it will strengthen innovations in AI automation and advanced semiconductor design support based on its ongoing collaboration with TSMC. The two companies’ cooperation is built on the TSMC Open Innovation Platform (OIP) ecosystem, and Siemens and TSMC are expanding support across the semiconductor design workflow based on their existing collaboration and this ecosystem. Siemens and TSMC are pushing ahead with stronger AI-based EDA automation and enhanced support for advanced packaging and process design.
In this process, the two companies are applying AI and agentic workflows to DRC error fixing as well as to place-and-route. They are also applying AI and agentic workflows to 3D IC design and silicon photonics design. Through this, they aim to improve semiconductor design productivity and boost tape-out efficiency.
They are also supporting joint customers in improving design productivity, shortening design cycles, and efficiently managing increasingly sophisticated advanced semiconductor design environments. Siemens and TSMC are broadening support across the entire design process while strengthening support for joint customers.
This collaboration is focused on AI-based agents for automating DRC error fixing in digital and custom IC design flows. Siemens and TSMC have implemented Calibre-based AI agents, and these AI agents are tightly integrated with Aprisa and Solido software.
With this collaboration, the companies aim to reduce repetitive manual work for engineers, improve workflow efficiency, and shorten tape-out time.
Ankur Gupta, executive vice president and general manager of Siemens Digital Industries Software’s EDA IC software business, said the continued collaboration with TSMC is a prime example of efforts to provide AI-based automation and advanced semiconductor design capabilities that support customer innovation at the most advanced process nodes. He also said that combining the Siemens EDA portfolio with TSMC process and packaging technologies improves customer productivity, design speed, and design reliability.
TSMC sees AI as an opportunity to raise productivity and efficiency across the semiconductor design workflow as design complexity increases. Avik Sarkar, director of TSMC’s ecosystem and alliance management, said that with this recognition, TSMC is pursuing cooperation with OIP partners such as Siemens.
Sarkar said the focus of this collaboration is to help engineers manage design complexity, support achievement of performance and power efficiency targets, and provide intelligent and reliable automation.
Siemens and TSMC are advancing AI-based semiconductor design through the Fuse EDA AI System and Fuse EDA AI Agent. The technology aims to implement EDA workflows capable of long-duration autonomous execution and self-verification, reasoning through complex multi-step design tasks, coordinating work across multiple EDA tools, and continuously verifying and improving engineering results.
With NVIDIA AI technology applied to the Fuse EDA AI Agent, token efficiency improves, while inference and execution performance for long-running engineering tasks also improves.
On this foundation, the AI-based DRC error-fixing workflow combines Calibre software, Aprisa AI, and Solido Fuse, and it intelligently identifies, analyzes, and resolves design rule violations in digital and custom IC design processes. In DRC debugging, Calibre Check Assist provides context-specific guidance and design rule information, streamlining engineers’ diagnosis and resolution of design rule violations.
The two companies are expanding the scope of their collaboration beyond these capabilities to include agentic custom IC design functions based on Solido Fuse, as well as agentic place-and-route workflows using Aprisa and digital implementation workflows using Aprisa.
The technology aims to automate repetitive and time-consuming tasks and provide AI-based guidance that reflects design characteristics. Through this, the goal is to accelerate design convergence and improve productivity from design generation through tape-out.
With this direction, Siemens and TSMC are continuing collaboration on advanced 3D IC design support for TSMC 3DFabric. The two companies are continuing their partnership in line with a direction that uses automation and AI guidance to reduce bottlenecks in the design process and improve overall efficiency from early design through tape-out.
Siemens has implemented multi-machine support for Calibre 3DStack Advanced for antenna verification between chiplets. The implementation scope includes support for the wafer-level 3D IC chip stacking platform TSMC-SoIC.
Siemens is working on certification for support of CoWoS-L with local silicon interconnects. Based on this, it plans to improve the scalability needed for increasingly complex 3D IC designs and enhance 3D IC design execution performance.
One of the main items in this collaboration is improved performance in the interface verification flow for TSMC-SoW. From there, the scope of collaboration is expanding to 3D IC and multiphysics design.
The two companies are carrying out collaboration on 3D IC and multiphysics design, including silicon photonics and advanced packaging technologies, using Siemens Solido Simulation Suite, Calibre xACT, and Calibre 3DThermal. In addition, Calibre 3DThermal has obtained verification for static and transient thermal analysis in TSMC 3DFabric technology and verification for static and transient thermal analysis in TSMC A16.
Calibre 3DThermal has also completed support for the thermal analysis reference flow for system-on-wafer (SoW), and work on the TSMC-COUPE reference flow is also under way. The two companies are continuing to expand full support for 3Dblox with major joint customers, including chip-package co-design workflows.
They are also jointly developing pre-simulation-based die-to-die (D2D) automatic routing technology using Aprisa. The goal of this technology is to derive optimized routing configurations that can meet signal integrity specifications.
Siemens EDA tools are used from design through implementation and verification in TSMC-COUPE. The tools in use are Siemens EDA Innovator3D IC Integrator, Calibre 3DStack, Solido Simulation Suite, L-Edit, and Calibre Interactive. Among them, Solido Simulation Suite supports PAM4 measurements related to the optical transceiver interface of TSMC-COUPE technology.
At the same time, Siemens and TSMC are expanding technology certification and design support for advanced process nodes. Calibre nmDRC, Calibre nmLVS, Calibre xACT, and Calibre PERC have obtained certification for the TSMC A14 process node. Solido Simulation Suite has obtained SPICE accuracy certification for TSMC N3C, A16, and A14 process technologies, and supports analog, RF, and memory verification.
Siemens and TSMC’s collaboration is also expanding to certification of TSMC custom design reference flows and verification and analysis tools. Siemens technology provides reliability-aware simulation, which supports IC aging, real-time self-heating, and safe operating area checks. Solido Design Environment supports variability-aware verification and automatic cell optimization.
Specifically, mPower software has obtained transistor-level IR/EM analysis certification for TSMC N2P digital process and N2P analog process, as well as N3C analog process. Siemens is also working with TSMC on developing a custom design reference flow for N2 and N3 processes to address electromigration and IR drop. In addition, certification work is under way for Aprisa software for A14 technology and for mPower analog software for A14 technology.
At the same time, Siemens has expanded the scope of its collaboration with TSMC across the advanced process design ecosystem. Siemens Xcelerator Academy provides self-directed, on-demand learning resources for using the Siemens EDA portfolio, and the target users are Siemens and TSMC joint customers as well as TSMC Design Center Alliance partners. The program has also released a hands-on tutorial for an end-to-end digital implementation flow based on TSMC 5-nanometer process technology.
Source: TECHWORLD · Park Gyu-chan
Original: https://www.epnc.co.kr/news/articleView.html?idxno=407860
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Source: TECHWORLD
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