SK hynix to Bridge HBM and SSD With HBF
IT DAILY · · 2 views
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SK hynix unveiled HBF, PIM, and SALT-KV to expand its AI memory portfolio.
HBF is a technology that applies TSV to NAND flash to reduce the performance and capacity gap between HBM and SSD.
SK hynix is pursuing a strategy of combining 3D-stacked DRAM, HBM, HBF, and multiple memory tiers by workload.
SK hynix is broadening its AI memory portfolio. As AI use cases expand from training to inference and agents, the requirements for memory are also shifting toward greater diversity in performance and capacity. In response, SK hynix is pursuing a strategy to refine heterogeneous memory combinations for each workload, using high-bandwidth flash (HBF) as a key means of linking HBM and SSD.
SK hynix announced the details on the 18th. The company unveiled HBF, processing-in-memory (PIM), and "SALT-KV" at "AI Infrastructure Summit 2026," held from the 15th to the 17th (local time) in Santa Clara, California. The company said it was showcasing next-generation AI memory technologies together under its push to expand the AI memory domain.
A photo provided by SK hynix shows visitors looking at an SK hynix HBF structural model. The photo credit is SK hynix.
HBF is a technology that applies the same through-silicon vias (TSV) used in HBM to NAND flash. SK hynix said HBF aims to improve data processing speed by boosting bandwidth while leveraging NAND's large-capacity characteristics. Through this, the company said it seeks to narrow the performance and capacity gap between HBM and SSD.
The background to the need for this new memory tier is the diversification of AI workloads. AI workloads now range from ultra-low-latency agent services that require quick responses to long-context services that process large amounts of data. As a result, the required memory capacity, bandwidth, and latency differ from one another, and SK hynix judged that the existing GPU-HBM structure alone cannot meet all of those differing demands.
On the 8th, SK hynix unveiled its "full-stack AI memory" strategy at the "2026 SK hynix Future Forum" held at its Icheon campus in Gyeonggi Province. The strategy combines 3D-stacked DRAM, HBM, and HBF. The company said the combination is built on the basis of suitability for AI workloads.
Experts say that as AI evolves into agentic AI, state information management becomes more complex, making it difficult to respond with a single memory type alone. Seoul National University professor Yoon Seong-ro said that as AI develops into agentic AI, the amount and characteristics of state information become more diverse, and the burden of storing and managing that information increases, creating limits to responding with a single general-purpose memory. HyperAccel CEO Kim Ju-young said that, accordingly, it is necessary to use multiple memory tiers such as HBM, DRAM, Compute Express Link (CXL), and SSD, tailored to each workload.
Against this backdrop, SK hynix is also developing technologies that differentiate its data-processing methods alongside HBF. PIM is a concept that integrates computing functions into memory, with the goal of reducing data movement between the processor and memory. At the event, SK hynix unveiled its PIM-based "AiM" chip and the "AiMX" accelerator card equipped with "AiM."
SK hynix is also introducing technologies that change data-processing and placement methods. "SALT-KV" has the ability to distribute the "KV cache" generated during LLM operations across HBM, DRAM, and SSD. This technology increases the efficiency of high-performance memory use by selecting the appropriate memory tier based on data reusability and storage costs.
Lim Eui-cheol, vice president at SK hynix, said at the AI Infrastructure Summit that AI workloads are diversifying from ultra-low-latency agent services to long-context services that emphasize cost efficiency. He said the existing GPU-HBM structure alone makes it difficult to meet these new requirements, and explained that the company is preparing new solutions spanning hardware and software, including PIM, HBF, and SALT-KV, to respond to changing workloads.
At the Future Forum, Lim Eui-cheol, vice president at SK hynix, presented the full-stack AI memory strategy and outlined a direction for combining 3D-stacked DRAM, HBM, and HBF to match workloads. He also disclosed a strategy to pursue system-level co-design with AI service, software, and accelerator companies.
Source: IT DAILY · Kim Byung-ju
Original: https://www.itdaily.kr/news/articleView.html?idxno=241729
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Source: IT DAILY
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