Lattice Unveils Quantum-Resistant Security FPGA 'Mach-N2'... Starts Work on Server Version
IT DAILY ·
✦ AI Summary
Lattice Semiconductor announced the Mach-N2 FPGA lineup and the natural-language-based design AI tool Lattice Prompt on the 17th. Mach-N2 is a security control FPGA with PQC and physical tamper-response features, offering up to 220,000 system logic cells and 350MHz programmable fabric performance. Lattice Prompt links existing AI development environments with Lattice Radiant to carry out FPGA design work, and Lattice said productivity for general FPGA design tasks improved by more than 10 times compared with before.
Lattice Semiconductor announced the Mach-N2 FPGA lineup and Lattice Prompt on the 17th.
Lattice Semiconductor unveiled Mach-N2, a security control FPGA that applies post-quantum cryptography (PQC) and physical tamper-response features, targeting the control and security needs of long-running systems such as data center and network equipment. Mach-N2 is designed for the control and security of long-term operating systems such as data center and network equipment.
Lattice Semiconductor also unveiled Lattice Prompt, a natural-language-based FPGA design AI development tool. Lattice Prompt is a tool that links the AI tools developers already use with Lattice design software to carry out FPGA design work.
Lattice Semiconductor has also begun developing products for the server market.
Mach-N2 is based on Lattice's compact FPGA platform, Nexus 2, and offers up to 220,000 system logic cells. It also delivers 350MHz programmable fabric performance and supports PCIe 4.0 and SERDES at up to 16Gbps.
The product was developed as a design aligned with the NSA's Commercial National Security Algorithm Suite 2.0 (CNSA 2.0). CNSA 2.0 is intended to enable the transition of national security systems to post-quantum cryptography, and Mach-N2 supports ML-DSA, LMS, and XMSS for digital signatures while applying ML-KEM for cryptographic key exchange.
Post-quantum algorithms are technologies designed to prepare for the possibility that sufficiently powerful future quantum computers could break today's public-key cryptography. NIST finalized the first PQC standards, including ML-KEM and ML-DSA, in 2024 and is recommending system migration. At the same time, the NSA is pushing ahead with a transition to post-quantum cryptography based on CNSA 2.0 for national security systems.
Mach-N2 supports in-field cryptographic algorithm updates so that cryptographic algorithms can be refreshed when security standards and requirements change without replacing hardware. The product is aimed at long replacement-cycle systems such as servers and network equipment.
Mach-N2 includes nonvolatile flash memory inside the FPGA, and the nonvolatile flash memory is used to store configuration data. It also blocks external access to the configuration bitstream and to user flash memory. In addition, it shortens boot time by reducing the process of loading configuration data from external memory.
The integrated flash can store up to 3 configuration images. The images that can be stored are the main image, the secondary image, and the recovery 'golden image.'
If a configuration problem occurs, the system can recover by switching to another image. The configuration-completion target for the product with up to 220,000 system logic cells is within 30 ms.
The product applies physical tamper-detection features and monitors system voltage and temperature to detect abnormal conditions that go beyond the configured range and respond in a pre-defined manner. It also supports PUF, generating a unique identifier based on each device's distinct physical characteristics and using it for device identification, platform integrity verification, and supply-chain integrity verification.
The reason Lattice applied PQC and tamper-response features is the long replacement cycle of data center and network equipment. As NIST's PQC standardization progresses and the transition under CNSA 2.0 also moves forward, the need to prepare for changes to cryptographic systems at the design stage is increasing in long-life infrastructure.
Along with that direction, Lattice's Mach-N2 is designed for control and security in computing systems, control and security in communications systems, and control and security in industrial infrastructure systems. Development for application in the server market is also under way, and Lee Ki-hoon, a Lattice Semiconductor manager, said that while the specific mass-production timing for Mach-N2 in AI servers has not been disclosed due to various hyperscaler-related issues, product development for the server market has already begun.
Lattice's Mach-N2 has been taking orders since the 16th. Mach-N2 is also being supplied in advance as samples to some customers in the computing and communications sectors.
Lattice unveiled Lattice Prompt, an AI application tool for FPGA development work. The tool performs design tasks based on the developer's natural-language input.
Lattice Prompt links existing AI development environments with Lattice's FPGA design software, Lattice Radiant. The Model Context Protocol (MCP) is used in this process, and MCP is an open standard that connects AI models with external tools.
Examples of integrated tools include Claude Code, Cursor, and Visual Studio Code. Lattice Prompt uses Lattice documentation, datasheets, and design knowledge.
Its scope goes beyond code generation to include the overall design process. Natural-language commands are applied to the stages of simulation, synthesis, placement, routing, timing analysis, and bitstream generation. When a developer describes a function, the AI works with Lattice Radiant to carry out the tasks needed to implement the FPGA.
Lattice released the results of early user testing and said that productivity for general FPGA design tasks improved by more than 10 times compared with before. The manager cited DDR4 controller design as an example of the productivity benchmark. According to Lee, what used to take about 4 months could be completed in less than 10 days when the same engineer used Lattice Prompt.
Lattice said it also conducted a test converting CUDA code for optical coherence tomography (OCT) into FPGA operation. In this test, AI was used to convert reference code into Python code and block-level RTL design, while also optimizing FPGA resources and performance. Lattice said the work, which previously took several months, was completed in 30 hours.
However, Lattice said the developer must still perform final verification of AI-generated design results. Lee said that, separate from the reliability of AI-generated code, responsibility for final verification rests with the developer.
Lattice Prompt is offered for free and is compatible with the latest version of Lattice Radiant. Developers can run Lattice Radiant in local environments and also in developer network environments. In addition, long-running compilation tasks are handled in the background, supporting operating characteristics during development.
Source: IT DAILY · Kim Byeong-ju
Original: https://www.itdaily.kr/news/articleView.html?idxno=241625
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Source: IT DAILY
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